Memory devices (which are sometimes referred to herein as “memories”) are typically provided as internal, semiconductor, integrated circuits in computers or other electronic systems. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Changes in threshold voltage of the cells, through programming of a charge storage structure, such as floating gates or trapping layers or other physical phenomena, determine the data state of each cell. Common electronic systems that utilize flash memory devices include, but are not limited to, personal computers, personal digital assistants (PDAs), digital cameras, digital media players, digital recorders, games, appliances, vehicles, wireless devices, cellular telephones, and removable memory modules, and the uses for flash memory continue to expand.
As the performance and complexity of electronic systems increase, the requirement for additional memory in a system also increases. However, in order to continue to reduce the costs of the system, the parts count must be kept to a minimum. This can be accomplished by increasing the memory density of an integrated circuit by using such technologies as multilevel cells (MLC). For example, MLC NAND flash memory is a very cost effective non-volatile memory. In a four level MLC, there are four potential final data states. One technique used to increase the memory capacity of a NAND memory device is to form the memory array in a three dimensional (3D) manner. In other words, instead of the series memory strings being formed horizontally on a memory die which is typically referred to as 2D memory, the series strings are formed vertically on a substrate.
Programming in memories is typically accomplished by applying a plurality of programming pulses at a programming voltage (Vpgm), separated by verify pulses, to program each memory cell of a selected group (e.g., a selected page) of memory cells to a respective target data state (which may be an interim or final data state). With such a scheme, the programming pulses are applied to access lines (e.g., word lines) for selected cells. After each programming pulse, a verify pulse or a plurality of verify pulses are used to verify the programming of the selected cells. Current programming uses many programming pulses in an incremental step pulse programming scheme, where each programming pulse is a single pulse that moves cell threshold voltage by a certain amount, with Vpgm increasing with each subsequent programming pulse.
NAND memories are typically programmed by holding a channel of a selected cell to be programmed at a reference voltage (e.g., ground), or at a selective slow programming convergence (SSPC) voltage, and applying the programming pulses and verify pulses described above. Programming using this method is applicable for any programmed target data state (e.g., L1, L2, L3 in the case of a two bits per cell multi-level memory, where L0 may be an “erased” target data state). The first programming operation typically uses a Vpgm high enough to start programming selected cells to a first programmed data state (e.g., L1), but low enough to not overshoot the programming of those cells to the second programmed target data state (e.g., L2). The program voltage increases sequentially in subsequent operations, until the cells to be programmed to the third programmed data state (L3) are finished programming and the program operation is completed.
As NAND density increases with scaling, increased access line and data line (e.g., bit line) capacitances lead to an increased programming time (Tprog). In addition, new array architectures used in conjunction with three dimensional NAND also result in increased capacitances, further driving up Tprog. Program disturb effects, which are well known, are typically controlled during programming, so as to have as small an impact on final threshold voltages in programming as can be managed.
For the reasons stated above and for other reasons that will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for improved programming time in memories.